Qualification Required:

• Bachelors or Masters with 4+ years of experiences in developing standard cells.

Roles And Responsibilities

• Standard cell circuit design, simulation and layout creation.
• Standard Cell or IO characterization
• Library view generation to enable digital, analog and mixed-signal design and PnR flows
• Library QA methodology development and execution
• Debugging library and design issues
• Programming and scripting for automation

Required Technical And Professional Expertise:

• A detailed understanding of CMOS and FinFet device characteristics
• Prior experience and understanding of digital circuit design (combinational and sequential logic)
• Ability to setup and run spice simulations
• Exposure to standard cell characterization tools such as Cadence Liberate or Synopsis PrimeLib
• Experience in Library characterization, view generation and Library QA
• Good knowledge of timing, noise, power and variation modeling for standard cells
• Strong in scripting languages such as Perl and Python
• Good interpersonal and networking skills
• Self-motivated, hardworking and exhibits attention to detail