Qualification Required:

• Typically requires minimum of 5-13+ years of experience in Analog Circuit Design
• Bachelors / Master Degree in E&E and E&C
• Strong communication & team work skills

Roles & Responsibilities

• Expert in Power Management including hands-on DC-DC Converter, other precision analog circuits like operational amplifiers, Band-gap references, POR, Current Limit circuits, LDO regulators, comparators, oscillators etc. Experience in transceiver design for high speed interface such as Serdes, highspeed,DDR, HBM, PCIe, USB3, JESD204, Experience in transceiver design for high speed interface such as PLL,CTLE, DFE, CDR,PCIe, USB3, JESD204
• Candidate should have taken atleast one block from circuit design and should be guide layout engineers for closure.
• Strong competency in small signal analysis and various frequency compensation techniques. Understanding of chip level ESD/LU requirements.
• Top-level integration, Block-level verification across PVT, Statistical Mismatch & mixed signal Verification.
• Hands-on working with Tools – Virtuoso/Tanner for schematic/model design & verification.
• Work closely with the Layout engineer to get optimized IP layout. This involves managing IP planning.
• Experience with Silicon validation and debug process.
• Planning, managing full-chip execution with team.
• Advantage if candidate has experience with high-current designs and/or multi-phase operation switching regulators